Silicon carbide is known to be a superior semiconductor material for high voltage and high frequency applications. The high voltage capability of SiC is due to its large critical electric field (2.times.10.sup.6 V/cm), which is about 10 times higher than that of silicon. The SiC high voltage devices are expected to have 200 times smaller power loss when compared to a similarly rated Si device. SiC MOSFETs are expected to replace Si IGBTs and GTOs. However, the performance of low voltage, low power SiC devices is expected to be inferior to that of existing Si CMOS devices. The reason for this is: (1) the mobility of carriers in SiC is smaller than that in Si; and (2) the device technology of SiC is less mature than that of Si, which forces the feature size and power losses to be higher for low voltage SiC devices. There is increasing interest in providing a high voltage semiconductor device and a low voltage semiconductor device in a monolithic, same chip integrated circuit structure and particularly such a device on silicon carbide.
Additionally, silicon carbide is chemically inert in nature and is not attacked by most of the common etchants at room temperature due to the strong bond between carbon and silicon in monocrystalline silicon carbide. At the same time, the bonds between silicon and carbon in amorphous silicon carbide are weak. In my work with B. J. Baliga, it was reported that monocrystalline silicon carbide is not attacked by most of the common laboratory etchants, such as HF, HNO.sub.3, KOH, HCl, etc. while amorphous silicon carbide can be etched by treating it as a mixture of silicon and carbon. See Alok et al, Journal of Electronic Materials, Vol. 24, No. 4, pp. 311-314 and the similar disclosure of U.S. Pat. No. 5,436,174 wherein this fact is used to form trenches in a monocrystalline silicon substrate by directing first electrically inactive ions using ion-implantation into a first portion of the monocrystalline silicon carbide substrate to create an amorphous silicon carbide region followed by removal of the first amorphous silicon carbide region to form a trench in the monocrystalline silicon carbide using an etchant which selectively etches amorphous silicon carbide at a higher rate than monocrystalline silicon carbide.
U.S. Pat. Nos. 5,318,915, 5,322,802, 5,436,174, and 5,449,925 disclose procedures which use amorphization to create deep PN junctions or deep trenches in SiC wafers. However, these references do not produce integrated circuits that combine the advantages of silicon carbide and silicon, and do not provide for improvement in speed and performance of integrated circuits. Other workers in the art (JPA 55024482 and JPA 07082098) have attempted to create SiC areas in a Si wafer by converting a thin layer of Si into SiC using ion implantation. Such thin layers cannot be used to create high voltage (&gt;1000V) power devices. Moreover, attempts in our laboratory to convert part of a Si wafer to SiC using high temperature ion implantation have been unsuccessful. There is a continued need in the art for integrated circuits that combine the excellent inversion layer mobility properties of silicon with the superior properties of silicon carbide for high voltage and high frequency applications and that comprise silicon low voltage devices and silicon carbide high voltage devices on a single chip.